Senior Silicon Validation Engineer, Google Cloud
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Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- 5 years of experience in silicon validation, bringing up, characterizing, and qualifying silicon.
- 5 years of experience developing firmware, embedded software, or functional tests for silicon validation.
- Experience with ASIC interfaces, memory systems (high bandwidth memory), or power management system features and ASICs.
Preferred qualifications:
- Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
About the job
In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
The CI2 Platform Enablement team drives Google’s custom ASICs from concept to production. We manage the end-to-end silicon life-cycle, including development, bringup, qualification, and long-term quality sustainability.We plan and integrate complex hardware and software stacks on emulation, simulation, and Field-programmable Gate Array (FPGA) platforms. Our team leads ASIC modeling, prototyping, and hardware/software co-design to ensure robust pre-silicon validation. We develop custom software-based test cases, workloads, test generators, and advanced debugging infrastructure.
In the post-silicon phase, we own the silicon validation effort, focusing on bringup, characterization, and performance benchmarking. We ensure our custom ASIC systems are qualified and sustainable, driving root-cause analysis to keep our fleet running at maximum efficiency. In this role, your work will directly impact critical hardware domains, including power features, high-speed interfaces, high bandwidth memory (HBM), compute functionality, and overall system performance optimization.
The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.
We're the driving channel behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.
The US base salary range for this full-time position is $156,000-$229,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.
Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.
Responsibilities
- Own the bringup and NPI (New Product Introduction) phases of the silicon development life-cycle. Enable custom silicon products within our platform infrastructure systems.
- Integrate and validate complex hardware/software designs in pre-silicon through functional bringup. Be responsible for developing the integration plan, coordinating hardware and software delivery, and creating necessary tests for validation.
- Develop detailed test plans, based on design specifications and coordination with a cross-functional team (architecture, design, software, firmware).
- Perform long-term system characterization and debug and help root-cause failures; provide feedback to improve features like power management quality, performance, and reliability through generations of designs. This includes pre-silicon prototyping platforms as well as through post-silicon bringup and production.
- Design, develop, operate, and maintain software based validation tests.
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