Foundry, IP and Package technologist, Google Cloud
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Minimum qualifications:
- Bachelor’s degree in Electrical Engineering, Material Science, Physics, Microelectronics, a related technical field, or equivalent practical experience.
- 8 years of experience in semiconductor foundry technologies, advanced process nodes and product engineering or yield analysis.
- Experience in leading post-silicon yield improvement, including root cause analysis, defect correlation, and process debugging.
- Experience with characterization of silicon interaction with package thermal and mechanical stress.
Preferred qualifications:
- 15 years of experience in test engineering, product engineering, foundry technology, advanced packaging development, or product yield engineering.
- Experience in debugging IP integration issues (e.g., HBM, SerDes, PCIe) and advanced packaging failures (2.5D/3D, flip-chip).
- Ability to drive technical feedback loops between foundry partners, internal architecture and design teams, and Post-Silicon (Post-Si) teams to resolve manufacturing limiters.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.
We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.
Responsibilities
- Drive yield modeling for NPIs, support pre silicon activities in Foundry aspects of new devices.
- Lead process debug investigations, utilizing inline data to isolate the root cause of yield limiters, distinguishing between random defects and systematic marginalities.
- Drive yield improvements by executing advanced statistical analysis on high-volume manufacturing data, identifying subtle process-design interactions that impact performance, and defining the necessary corrective actions.
- Collaborate with cross-functional design, product, and test teams to triage silicon failures, distinguishing between design bugs, foundry process marginalities, and packaging interaction issues to support New Product Introduction (NPI).
- Partner with architecture and design teams to feed back critical manufacturing constraints into future product definitions, ensuring that next-generation chiplets are architected to be resilient to known process variances.
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